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We respond the many requests of Editor in ZIPC and we made big effect on operation, coordination with each document sheet, and search function. We concentrate on design so that minimize the time of design creation.
- TRD (Task Releationship Diagram)
This is the document about diagram that is express relationship between systems and task relations.
- MSC (Message Sequence Chart)
This is the document about time axis chart that is express receiving message between system objects (task and handler and etc.).
- TC (Timing Chart)
This is the document about change in timing between system variable and IO.
- EHSTD (Extended Hierarchy State Transition Diagram)
This is the document about expressing state transition of the program.
Also, you can express Harel type state transition diagram.
- EHSTM (Extended Hierarchy State Transition Matrix)
State Transition Matrix is the hard core of ZIPC that helps to reduce bug at the design phase.
By using extended method, it helps to prevent huge STM.
"EHSTD <-> EHSTM" two-way convert function is installed !
MSC/TC becomes test and verification script at simulation !
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This is the function that statically verifies consistency between documents and document structures that is created by Editor.
Since description mistake and leakage verification became automation, it helps to prevent number of feedback that is created by mistake at design phase.
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This is the function that verifies document that created in Editor dynamically.
This finds defects which static verification could not find, also design quality improves rapidly.
- Installed C Compiler
It can simulate C code that is written in ZIPC document.
- Simulation which includes each RTOS operation
It can simulate includes uITRON Specification/OSEK operation.
- Installed plenty of debug functions
State Transition Matrix(EHSTM)/Task Relation Diagram(TRD)/Sequence(MSC)/Timing(TC)/Variable(Outside/Inside/architecture) can displays memory dump.
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VIP (Visual Interface Prototype)
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This is the function which simulate visual prototyping that coordinating with Simulator.
- Interface with Microsoft products Visual Basic and Visual C++
- Interface with Original Tool because VIP's interface is opened
- Support execution timing, synchronized and interrupt
- Connect with NEC product, Fujitsu product Code Simulator
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ATV (Auto Test and Verification)
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ATV is the function that test and verifies MSC and TC that is created as test scrip in Simulation. For doing ATV, quality improves at Simulation.
- Auto generate MSC and TC from Simulation result
It can analyze document that from Simulation result.
- EHSTM coverage function
It can figure out which part of EHSTM is tested or not.
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This is the function which can auto generate ANSI-C Code that is based on EHSTM created by Editor.
ZIPC can generate more efficient RAM ROM code than before.
(ROM reduced max of 70%) Also generation code of last version is prepared for existing user.
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If you add change in source code which is auto generated by Generator, this function effect updated information to design document.
Even if you add the source code at target debug, this function integrates source code and design document so that this reduces to create useless design document.
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